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Please use this identifier to cite or link to this item: https://hdl.handle.net/2440/1365
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dc.contributor.authorAshenden, Peter J.en
dc.contributor.authorWilsey, Philip A.en
dc.date.issued1999en
dc.identifier.citationVLSI Design, 1999; 10 (2):217-236en
dc.identifier.issn0279-2834en
dc.identifier.urihttp://hdl.handle.net/2440/1365-
dc.language.isoenen
dc.titlePrinciples for Extensions to VHDL for High-Level Modelingen
dc.typeJournal articleen
Appears in Collections:Computer Science publications

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