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https://hdl.handle.net/2440/72840
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Type: | Journal article |
Title: | Hardware prototyping of neural network based fetal electrocardiogram extraction |
Author: | Hasan, M. Reaz, M. |
Citation: | Measurement Science Review, 2012; 12(2):52-55 |
Publisher: | Slovenska Akademia Vied * Ustav Merania |
Issue Date: | 2012 |
ISSN: | 1335-8871 1335-8871 |
Statement of Responsibility: | M. A. Hasan, M. B. I. Reaz |
Abstract: | The aim of this paper is to model the algorithm for Fetal ECG (FECG) extraction from composite abdominal ECG (AECG) using VHDL (Very High Speed Integrated Circuit Hardware Description Language) for FPGA (Field Programmable Gate Array) implementation. Artificial Neural Network that provides efficient and effective ways of separating FECG signal from composite AECG signal has been designed. The proposed method gives an accuracy of 93.7% for R-peak detection in FHR monitoring. The designed VHDL model is synthesized and fitted into Altera's Stratix II EP2S15F484C3 using the Quartus II version 8.0 Web Edition for FPGA implementation. |
Keywords: | Fetal electrocardiogram neural network FPGA VHDL |
Rights: | Copyright status unknown |
DOI: | 10.2478/v10048-012-0007-8 |
Published version: | http://dx.doi.org/10.2478/v10048-012-0007-8 |
Appears in Collections: | Aurora harvest 5 Electrical and Electronic Engineering publications |
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