Please use this identifier to cite or link to this item:
https://hdl.handle.net/2440/47159
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Type: | Journal article |
Title: | Using transfer-resource graph for software-based verification of system-on-chip |
Author: | Xu, X. Lim, C. |
Citation: | IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems, 2008; 27(7):1315-1328 |
Publisher: | IEEE-Inst Electrical Electronics Engineers Inc |
Issue Date: | 2008 |
ISSN: | 0278-0070 1937-4151 |
Statement of Responsibility: | Xiaoxi Xu and Cheng-Chew Lim |
Abstract: | The verification of system-on-chip is challenging due to its high level of integration. Multiple components in a system can behave concurrently and compete for resources. Hence, for simulation-based verification, we need a methodology that allows one to automatically generate test cases for testing concurrent and resource-competing behaviors.We introduce the use of a transferresource graph (TRG) as the model for test generation. From a high abstraction level, TRG is able to model the parallelism between heterogeneous interaction forms in a system. We show how TRG is used in generating test cases of resource competitions and how these test cases are structured in event-driven test programs. For coverage, TRG can be converted to a Petri net, allowing one to measure the completeness of concurrency in simulation. |
Keywords: | Concurrency event-driven resourcecontention simulation system-on-chip |
Description: | Copyright © 2006 IEEE |
DOI: | 10.1109/TCAD.2008.923092 |
Published version: | http://dx.doi.org/10.1109/tcad.2008.923092 |
Appears in Collections: | Aurora harvest 6 Electrical and Electronic Engineering publications |
Files in This Item:
File | Description | Size | Format | |
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hdl_47159.pdf | 1.25 MB | Publisher's PDF | View/Open |
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